MPAMF_MBWUMON_IDR, MPAM Features Memory Bandwidth Usage Monitoring ID register
The MPAMF_MBWUMON_IDR characteristics are:
Purpose
Indicates the number of memory bandwidth usage monitors for this MSC. This register also indicates several properties of the MBWU monitors, including whether they support capture, scaling or long counters.
MPAMF_MBWUMON_IDR_s indicates the number of Secure memory bandwidth usage monitor instances. MPAMF_MBWUMON_IDR_ns indicates the number of Non-secure memory bandwidth usage monitor instances.
Configuration
The power domain of MPAMF_MBWUMON_IDR is IMPLEMENTATION DEFINED.
This register is present only when MPAMF_IDR.HAS_MSMON == 1 and MPAMF_MSMON_IDR.MSMON_MBWU == 1. Otherwise, direct accesses to MPAMF_MBWUMON_IDR are RES0.
Attributes
MPAMF_MBWUMON_IDR is a 32-bit register.
Field descriptions
The MPAMF_MBWUMON_IDR bit assignments are:
HAS_CAPTURE, bit [31]
The implementation of this MSC supports copying an MSMON_MBWU to the corresponding MSMON_MBWU_CAPTURE on a capture event.
| HAS_CAPTURE | Meaning |
|---|---|
| 0b0 |
MSMON_MBWU_CAPTURE is not implemented and there is no support for capture events in the MBWU monitor. |
| 0b1 |
The MSMON_MBWU_CAPTURE register is implemented and the MBWU monitor supports the capture event behavior. |
HAS_LONG, bit [30]
When ARMv8.6-MPAM is implemented:
When ARMv8.6-MPAM is implemented:
Indicates whether MSMON_MBWU_L is implemented.
If HAS_CAPTURE == 1, indicates whether MSMON_MBWU_L_CAPTURE is implemented.
| HAS_LONG | Meaning |
|---|---|
| 0b0 |
Does not implement MSMON_MBWU_L or MSMON_MBWU_L_CAPTURE. |
| 0b1 |
Implements MSMON_MBWU_L. If HAS_CAPTURE == 1, MSMON_MBWU_L_CAPTURE is also implemented. |
Otherwise:
Otherwise:
Reserved, RES0.
LWD, bit [29]
When ARMv8.6-MPAM is implemented:
When ARMv8.6-MPAM is implemented:
Long register VALUE width.
If MPAMF_MBWUMON_IDR.HAS_LONG == 0, MPAMF_MBWUMON_IDR.LWD must also be 0.
| LWD | Meaning |
|---|---|
| 0b0 |
If MPAMF_MBWUMON_IDR.HAS_LONG == 1, MSMON_MBWU_L has 44-bit VALUE field in bits [43:0]. Bits [62:44] are RES0. If HAS_LONG == 1 and MPAMF_MBWUMON_IDR.HAS_CAPTURE == 1, MSMON_MBWU_L_CAPTURE also has 44-bit VALUE field in bits [43:0]. |
| 0b1 |
MSMON_MBWU_L has 63-bit VALUE field in bits [62:0]. If MPAMF_MBWUMON_IDR.HAS_CAPTURE == 1, MSMON_MBWU_L_CAPTURE also has 63-bit VALUE field in bits [62:0]. |
Otherwise:
Otherwise:
Reserved, RES0.
Bits [28:21]
Reserved, RES0.
SCALE, bits [20:16]
Scaling of MSMON_MBWU.VALUE in bits. If scaling is enabled by MSMON_CFG_MBWU_CTL.SCLEN, the byte count in the VALUE field has been shifted by SCALE bits to the right.
| SCALE | Meaning |
|---|---|
| 0b00000 |
Scaling is not implemented. |
| 0bxxxxx |
Other values are right shift count when scaling is enabled. |
NUM_MON, bits [15:0]
The number of memory bandwidth usage monitors implemented in this MSC.
Accessing the MPAMF_MBWUMON_IDR
This register is within the MPAM feature page memory frames. In a system that supports Secure and Non-secure memory maps, there must be both Secure and Non-secure MPAM feature pages.
MPAMF_MBWUMON_IDR is read-only.
MPAMF_MBWUMON_IDR must be readable from the Non-secure and Secure MPAM feature pages.
MPAMF_MBWUMON_IDR is permitted to have the same contents when read from either the Secure and Non-secure MPAM feature pages unless the register contents is different for Secure and Non-secure versions, when there must be separate registers in the Secure (MPAMF_MBWUMON_IDR_s) and Non-secure (MPAMF_MBWUMON_IDR_ns) MPAM feature pages.
MPAMF_MBWUMON_IDR can be accessed through the memory-mapped interfaces:
| Component | Frame | Offset | Instance |
|---|---|---|---|
| MPAM | MPAMF_BASE_s | 0x0090 | MPAMF_MBWUMON_IDR_s |
Accesses on this interface are RO.
| Component | Frame | Offset | Instance |
|---|---|---|---|
| MPAM | MPAMF_BASE_ns | 0x0090 | MPAMF_MBWUMON_IDR_ns |
Accesses on this interface are RO.