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TRCDEVID2, Device Configuration Register 2
The TRCDEVID2 characteristics are:
Purpose
Provides discovery information for the component.
For additional information see the CoreSight Architecture Specification.
Configuration
This register is present only when ETE is implemented. Otherwise, direct accesses to TRCDEVID2 are RES0.
Attributes
TRCDEVID2 is a 32-bit register.
Field descriptions
The TRCDEVID2 bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 |
Bits [31:0]
Reserved, RES0.
Accessing the TRCDEVID2
External debugger accesses to this register are unaffected by the OS Lock.
TRCDEVID2 can be accessed through the external debug interface:
Component | Offset |
---|---|
ETE | 0xFC0 |
This interface is accessible as follows:
- When !IsTraceCorePowered() accesses to this register generate an error response.
- Otherwise accesses to this register are RO.