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TRCIDR7, ID Register 7
The TRCIDR7 characteristics are:
Purpose
Returns the tracing capabilities of the trace unit.
Configuration
External register TRCIDR7 bits [31:0] are architecturally mapped to AArch64 System register TRCIDR7[31:0] .
This register is present only when ETE is implemented. Otherwise, direct accesses to TRCIDR7 are RES0.
Attributes
TRCIDR7 is a 32-bit register.
Field descriptions
The TRCIDR7 bit assignments are:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | |||||||||||||||||||||||||||||||
Bits [31:0]
Reserved, RES0.
Accessing the TRCIDR7
TRCIDR7 can be accessed through the external debug interface:
| Component | Offset |
|---|---|
| ETE | 0x1FC |
This interface is accessible as follows:
- When OSLockStatus() or !IsTraceCorePowered() accesses to this register generate an error response.
- Otherwise accesses to this register are RO.