TRCEVENTCTL0R, Event Control 0 Register
The TRCEVENTCTL0R characteristics are:
Purpose
Controls the generation of ETEEvents.
Configuration
AArch64 System register TRCEVENTCTL0R bits [31:0] are architecturally mapped to External register TRCEVENTCTL0R[31:0] .
This register is present only when FEAT_ETE is implemented and TRCIDR4.NUMRSPAIR != 0b0000. Otherwise, direct accesses to TRCEVENTCTL0R are UNDEFINED.
Attributes
TRCEVENTCTL0R is a 64-bit register.
Field descriptions
The TRCEVENTCTL0R bit assignments are:
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| RES0 | |||||||||||||||||||||||||||||||
| EVENT3_TYPE | RES0 | EVENT3_SEL | EVENT2_TYPE | RES0 | EVENT2_SEL | EVENT1_TYPE | RES0 | EVENT1_SEL | EVENT0_TYPE | RES0 | EVENT0_SEL | ||||||||||||||||||||
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Bits [63:32]
Reserved, RES0.
EVENT3_TYPE, bit [31]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b11:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b11:
Chooses the type of Resource Selector.
| EVENT3_TYPE | Meaning |
|---|---|
| 0b0 |
A single Resource Selector. TRCEVENTCTL0R.EVENT3.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event. |
| 0b1 |
A Boolean-combined pair of Resource Selectors. TRCEVENTCTL0R.EVENT3.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT3.SEL[4] is RES0. |
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
Bits [30:29]
Reserved, RES0.
EVENT3_SEL, bits [28:24]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b11:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b11:
Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT3.TYPE controls whether TRCEVENTCTL0R.EVENT3.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.
If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
Selecting Resource Selector pair 0 using this field is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
When any of the selected resource events occurs and TRCEVENTCTL1R.INSTEN[3] == 0b1, then Event element 3 is generated in the instruction trace element stream.
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
EVENT2_TYPE, bit [23]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b10:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b10:
Chooses the type of Resource Selector.
| EVENT2_TYPE | Meaning |
|---|---|
| 0b0 |
A single Resource Selector. TRCEVENTCTL0R.EVENT2.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event. |
| 0b1 |
A Boolean-combined pair of Resource Selectors. TRCEVENTCTL0R.EVENT2.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT2.SEL[4] is RES0. |
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
Bits [22:21]
Reserved, RES0.
EVENT2_SEL, bits [20:16]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b10:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b10:
Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT2.TYPE controls whether TRCEVENTCTL0R.EVENT2.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.
If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
Selecting Resource Selector pair 0 using this field is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
When any of the selected resource events occurs and TRCEVENTCTL1R.INSTEN[2] == 0b1, then Event element 2 is generated in the instruction trace element stream.
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
EVENT1_TYPE, bit [15]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b01:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b01:
Chooses the type of Resource Selector.
| EVENT1_TYPE | Meaning |
|---|---|
| 0b0 |
A single Resource Selector. TRCEVENTCTL0R.EVENT1.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event. |
| 0b1 |
A Boolean-combined pair of Resource Selectors. TRCEVENTCTL0R.EVENT1.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT1.SEL[4] is RES0. |
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
Bits [14:13]
Reserved, RES0.
EVENT1_SEL, bits [12:8]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b01:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b01:
Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT1.TYPE controls whether TRCEVENTCTL0R.EVENT1.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.
If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
Selecting Resource Selector pair 0 using this field is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
When any of the selected resource events occurs and TRCEVENTCTL1R.INSTEN[1] == 0b1, then Event element 1 is generated in the instruction trace element stream.
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
EVENT0_TYPE, bit [7]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b00:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b00:
Chooses the type of Resource Selector.
| EVENT0_TYPE | Meaning |
|---|---|
| 0b0 |
A single Resource Selector. TRCEVENTCTL0R.EVENT0.SEL[4:0] selects the single Resource Selector, from 0-31, used to activate the resource event. |
| 0b1 |
A Boolean-combined pair of Resource Selectors. TRCEVENTCTL0R.EVENT0.SEL[3:0] selects the Resource Selector pair, from 0-15, that has a Boolean function that is applied to it whose output is used to activate the resource event. TRCEVENTCTL0R.EVENT0.SEL[4] is RES0. |
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
Bits [6:5]
Reserved, RES0.
EVENT0_SEL, bits [4:0]
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b00:
When TRCIDR4.NUMRSPAIR != 0b0000 and TRCIDR0.NUMEVENT >= 0b00:
Defines the selected Resource Selector or pair of Resource Selectors. TRCEVENTCTL0R.EVENT0.TYPE controls whether TRCEVENTCTL0R.EVENT0.SEL is the index of a single Resource Selector, or the index of a pair of Resource Selectors.
If an unimplemented Resource Selector is selected using this field, the behavior of the resource event is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
Selecting Resource Selector pair 0 using this field is UNPREDICTABLE, and the resource event might fire or might not fire when the resources are not in the Paused state.
When any of the selected resource events occurs and TRCEVENTCTL1R.INSTEN[0] == 0b1, then Event element 0 is generated in the instruction trace element stream.
On a Trace unit reset, this field resets to an architecturally UNKNOWN value.
Otherwise:
Otherwise:
Reserved, RES0.
Accessing the TRCEVENTCTL0R
Must be programmed if implemented.
Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.
Accesses to this register use the following encodings:
MRS <Xt>, TRCEVENTCTL0R
| op0 | op1 | CRn | CRm | op2 |
|---|---|---|---|---|
| 0b10 | 0b001 | 0b0000 | 0b1000 | 0b000 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && CPTR_EL3.TTA == '1' then
UNDEFINED;
elsif CPACR_EL1.TTA == '1' then
AArch64.SystemAccessTrap(EL1, 0x18);
elsif EL2Enabled() && CPTR_EL2.TTA == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HDFGRTR_EL2.TRC == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL3) && CPTR_EL3.TTA == '1' then
if Halted() && EDSCR.SDD == '1' then
UNDEFINED;
else
AArch64.SystemAccessTrap(EL3, 0x18);
else
return TRCEVENTCTL0R;
elsif PSTATE.EL == EL2 then
if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && CPTR_EL3.TTA == '1' then
UNDEFINED;
elsif CPTR_EL2.TTA == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL3) && CPTR_EL3.TTA == '1' then
if Halted() && EDSCR.SDD == '1' then
UNDEFINED;
else
AArch64.SystemAccessTrap(EL3, 0x18);
else
return TRCEVENTCTL0R;
elsif PSTATE.EL == EL3 then
if CPTR_EL3.TTA == '1' then
AArch64.SystemAccessTrap(EL3, 0x18);
else
return TRCEVENTCTL0R;
MSR TRCEVENTCTL0R, <Xt>
| op0 | op1 | CRn | CRm | op2 |
|---|---|---|---|---|
| 0b10 | 0b001 | 0b0000 | 0b1000 | 0b000 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && CPTR_EL3.TTA == '1' then
UNDEFINED;
elsif CPACR_EL1.TTA == '1' then
AArch64.SystemAccessTrap(EL1, 0x18);
elsif EL2Enabled() && CPTR_EL2.TTA == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HDFGWTR_EL2.TRC == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL3) && CPTR_EL3.TTA == '1' then
if Halted() && EDSCR.SDD == '1' then
UNDEFINED;
else
AArch64.SystemAccessTrap(EL3, 0x18);
else
TRCEVENTCTL0R = X[t];
elsif PSTATE.EL == EL2 then
if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && CPTR_EL3.TTA == '1' then
UNDEFINED;
elsif CPTR_EL2.TTA == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL3) && CPTR_EL3.TTA == '1' then
if Halted() && EDSCR.SDD == '1' then
UNDEFINED;
else
AArch64.SystemAccessTrap(EL3, 0x18);
else
TRCEVENTCTL0R = X[t];
elsif PSTATE.EL == EL3 then
if CPTR_EL3.TTA == '1' then
AArch64.SystemAccessTrap(EL3, 0x18);
else
TRCEVENTCTL0R = X[t];