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ERRGSR, Error Group Status Register

The ERRGSR characteristics are:

Purpose

Shows the status for the records in the group.

Configuration

ERRGSR is implemented only as part of a memory-mapped group of error records.

This manual describes a group of error records accessed via a standard 4KB memory-mapped peripheral. For a 4KB peripheral, up to 24 error records can be accessed if the Common Fault Injection Model is implemented, and up to 56 otherwise.

Attributes

ERRGSR is a 64-bit register.

Field descriptions

The ERRGSR bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0S<m>, bit [m]
S<m>, bit [m]
313029282726252423222120191817161514131211109876543210

Bits [63:56]

Reserved, RES0.

S<m>, bit [m], for m = 0 to 55

When error record <m> is implemented and error record <m> supports this type of reporting:

The status for error record <m>. A read-only copy of ERR<m>STATUS.V.

S<m>Meaning
0b0

No error.

0b1

One or more errors.

If the Common Fault Injection Model is implemented, up-to 24 records can be implemented meaning bits [55:24] are RES0.


Otherwise:

Reserved, RES0.

Accessing the ERRGSR

ERRGSR can be accessed through the memory-mapped interfaces:

ComponentOffset
RAS0xE00

Accesses on this interface are RO.