GICD_TYPER2, Interrupt Controller Type Register 2
The GICD_TYPER2 characteristics are:
Provides information about which features the GIC implementation supports.
This register is present only when FEAT_GICv4p1 is implemented. Otherwise, direct accesses to GICD_TYPER2 are RES0.
When GICD_CTLR.DS == 0, this register is Common.
GICD_TYPER2 is a 32-bit register.
The GICD_TYPER2 bit assignments are:
nASSGIcap, bit 
Indicates whether SGIs can be configured to not have an active state.
SGIs have an active state.
SGIs can be globally configured not to have an active state.
This bit is RES0 on implementations that support two Security states.
VIL, bit 
Indicates whether 16 bits of vPEID are implemented.
GIC supports 16-bit vPEID.
GIC supports GICD_TYPER2.VID + 1 bits of vPEID.
VID, bits [4:0]
When GICD_TYPER2.VIL == 1, the number of bits is equal to the bits of vPEID minus one.
When GICD_TYPER2.VIL == 0, this field is RES0.
Accessing the GICD_TYPER2
GICD_TYPER2 can be accessed through the memory-mapped interfaces:
This interface is accessible as follows:
- When GICD_CTLR.DS == 0 accesses to this register are RO.
- When an access is Secure accesses to this register are RO.
- When an access is Non-secure accesses to this register are RO.