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TRCCLAIMSET, Claim Tag Set Register

The TRCCLAIMSET characteristics are:

Purpose

In conjunction with TRCCLAIMCLR, provides Claim Tag bits that can be separately set and cleared to indicate whether functionality is in use by a debug agent.

For additional information see the CoreSight Architecture Specification.

Configuration

External register TRCCLAIMSET bits [31:0] are architecturally mapped to AArch64 System register TRCCLAIMSET[31:0] .

This register is present only when FEAT_ETE is implemented. Otherwise, direct accesses to TRCCLAIMSET are RES0.

The number of claim tag bits implemented is IMPLEMENTATION DEFINED. Arm recommends that implementations support a minimum of four claim tag bits, that is, SET[3:0] reads as 0b1111.

Attributes

TRCCLAIMSET is a 32-bit register.

Field descriptions

The TRCCLAIMSET bit assignments are:

313029282726252423222120191817161514131211109876543210
SET<m>, bit [m]

SET<m>, bit [m], for m = 0 to 31

Claim Tag Set. Indicates whether Claim Tag bit m is implemented, and is used to set Claim Tag bit m to 0b1.

SET<m>Meaning
0b0

On a read: Claim Tag bit m is not implemented.

On a write: Ignored.

0b1

On a read: Claim Tag bit m is implemented.

On a write: Set Claim Tag bit m to 0b1.

Accessing the TRCCLAIMSET

TRCCLAIMSET can be accessed through the external debug interface:

ComponentOffset
ETE0xFA0

This interface is accessible as follows:

  • When OSLockStatus() or !IsTraceCorePowered() accesses to this register generate an error response.
  • Otherwise accesses to this register are RW.