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CSRPTR_EL2, Call Stack Recorder Pointer (EL2)

The CSRPTR_EL2 characteristics are:

Purpose

Contains the Call Stack Recorder pointer at EL2.

Configuration

This register is present only when FEAT_CSRE is implemented. Otherwise, direct accesses to CSRPTR_EL2 are UNDEFINED.

Attributes

CSRPTR_EL2 is a 64-bit register.

Field descriptions

The CSRPTR_EL2 bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
PTR
PTRRES0
313029282726252423222120191817161514131211109876543210

PTR, bits [63:3]

EL2 Call Stack Recorder Buffer pointer. Bits [63:3] of the virtual address of the next entry to be written in the Call Stack Recorder buffer. Bits [2:0] of the virtual address are always zero.

On a Warm reset, this field resets to an architecturally UNKNOWN value.

Bits [2:0]

Reserved, RES0.

Accessing the CSRPTR_EL2

Accesses to this register use the following encodings:

MRS <Xt>, CSRPTR_EL1

op0op1CRnCRmop2
0b100b0000b10000b00000b001
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.EnCSR == '0' then
        UNDEFINED;
    elsif EL2Enabled() && ((HaveEL(EL3) && SCR_EL3.FGTEn == '0') || HFGRTR_EL2.nCSR_EL1 == '0') then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && SCR_EL3.EnCSR == '0' then
        if Halted() && EDSCR.SDD == '1' then
            UNDEFINED;
        else
            AArch64.SystemAccessTrap(EL3, 0x18);
    elsif EL2Enabled() && HCR_EL2.<NV2,NV1,NV> == '111' then
        return NVMem[0x8C0];
    else
        return CSRPTR_EL1;
elsif PSTATE.EL == EL2 then
    if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.EnCSR == '0' then
        UNDEFINED;
    elsif HaveEL(EL3) && SCR_EL3.EnCSR == '0' then
        if Halted() && EDSCR.SDD == '1' then
            UNDEFINED;
        else
            AArch64.SystemAccessTrap(EL3, 0x18);
    elsif HCR_EL2.E2H == '1' then
        return CSRPTR_EL2;
    else
        return CSRPTR_EL1;
elsif PSTATE.EL == EL3 then
    return CSRPTR_EL1;
              

MRS <Xt>, CSRPTR_EL2

op0op1CRnCRmop2
0b100b1000b10000b00000b001
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if EL2Enabled() && HCR_EL2.NV == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    else
        UNDEFINED;
elsif PSTATE.EL == EL2 then
    if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.EnCSR == '0' then
        UNDEFINED;
    elsif HaveEL(EL3) && SCR_EL3.EnCSR == '0' then
        if Halted() && EDSCR.SDD == '1' then
            UNDEFINED;
        else
            AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return CSRPTR_EL2;
elsif PSTATE.EL == EL3 then
    return CSRPTR_EL2;
              

MSR CSRPTR_EL1, <Xt>

op0op1CRnCRmop2
0b100b0000b10000b00000b001
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.EnCSR == '0' then
        UNDEFINED;
    elsif EL2Enabled() && ((HaveEL(EL3) && SCR_EL3.FGTEn == '0') || HFGWTR_EL2.nCSR_EL1 == '0') then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && SCR_EL3.EnCSR == '0' then
        if Halted() && EDSCR.SDD == '1' then
            UNDEFINED;
        else
            AArch64.SystemAccessTrap(EL3, 0x18);
    elsif EL2Enabled() && HCR_EL2.<NV2,NV1,NV> == '111' then
        NVMem[0x8C0] = X[t];
    else
        CSRPTR_EL1 = X[t];
elsif PSTATE.EL == EL2 then
    if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.EnCSR == '0' then
        UNDEFINED;
    elsif HaveEL(EL3) && SCR_EL3.EnCSR == '0' then
        if Halted() && EDSCR.SDD == '1' then
            UNDEFINED;
        else
            AArch64.SystemAccessTrap(EL3, 0x18);
    elsif HCR_EL2.E2H == '1' then
        CSRPTR_EL2 = X[t];
    else
        CSRPTR_EL1 = X[t];
elsif PSTATE.EL == EL3 then
    CSRPTR_EL1 = X[t];
              

MSR CSRPTR_EL2, <Xt>

op0op1CRnCRmop2
0b100b1000b10000b00000b001
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if EL2Enabled() && HCR_EL2.NV == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    else
        UNDEFINED;
elsif PSTATE.EL == EL2 then
    if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.EnCSR == '0' then
        UNDEFINED;
    elsif HaveEL(EL3) && SCR_EL3.EnCSR == '0' then
        if Halted() && EDSCR.SDD == '1' then
            UNDEFINED;
        else
            AArch64.SystemAccessTrap(EL3, 0x18);
    else
        CSRPTR_EL2 = X[t];
elsif PSTATE.EL == EL3 then
    CSRPTR_EL2 = X[t];