CNTPCT, Counter-timer Physical Count

The CNTPCT characteristics are:

Purpose

Holds the 64-bit physical count value.

Configuration

The power domain of CNTPCT is IMPLEMENTATION DEFINED.

For more information, see 'Power and reset domains for the system level implementation of the Generic Timer'.

Attributes

CNTPCT is a 64-bit register.

Field descriptions

The CNTPCT bit assignments are:

Bits [63:0]

Physical count value.

Accessing the CNTPCT

CNTPCT can be implemented in any implemented CNTBaseN frame, and in the corresponding CNTEL0BaseN frame, as a RO register.

'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames' describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame:

• Whether the CNTBaseN frame has virtual timer capability.
• Whether the corresponding CNTEL0BaseN frame is implemented.
• For an implementation that recognizes two Security states, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Non-secure accesses.

For an implemented CNTBaseN frame:

• CNTPCT is accessible in that frame, as a RO register, if the value of CNTACR<n>.RPCT is 1.
• Otherwise, the CNTPCT address in that frame is RAZ/WI.

For an implemented CNTEL0BaseN frame:

• CNTPCT is accessible in that frame if both:
  • CNTPCT is accessible in the corresponding CNTBaseN frame.
  • The value of CNTEL0ACR.EL0PCTEN is 1.
• Otherwise, the CNTPCT address in that frame is RAZ/WI.

If the implementation supports 64-bit atomic accesses, then the CNTPCT register must be accessible as an atomic 64-bit value.

CNTPCT can be accessed through the memory-mapped interfaces:

Accesses on this interface are RO.

Accesses on this interface are RO.

Accesses on this interface are RO.

Accesses on this interface are RO.