EDWAR, External Debug Watchpoint Address Register
The EDWAR characteristics are:
Purpose
Returns the virtual data address being accessed when a Watchpoint Debug Event was triggered.
Configuration
EDWAR is in the Core power domain.
Attributes
EDWAR is a 64-bit register.
Field descriptions
The EDWAR bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
Watchpoint address | |||||||||||||||||||||||||||||||
Watchpoint address | |||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Bits [63:0]
Watchpoint address. The data virtual address being accessed when a Watchpoint Debug Event was triggered and caused entry to Debug state. This address must be within a naturally-aligned block of memory of power-of-two size no larger than the DC ZVA block size.
The value of this register is UNKNOWN if the PE is in Non-debug state, or if Debug state was entered other than for a Watchpoint debug event.
The value of EDWAR[63:32] is UNKNOWN if Debug state was entered for a Watchpoint debug event taken from AArch32 state.
The EDWAR is subject to the same alignment rules as the reporting of a watchpointed address in the FAR. See 'Determining the memory location that caused a Watchpoint exception'.
On a Cold reset, this field resets to an architecturally UNKNOWN value.
Accessing the EDWAR
EDWAR can be accessed through the external debug interface:
Component | Offset | Instance | Range |
---|---|---|---|
Debug | 0x030 | EDWAR | 31:0 |
This interface is accessible as follows:
- When IsCorePowered(), !DoubleLockStatus() and !OSLockStatus() accesses to this register are RO.
- Otherwise accesses to this register generate an error response.
Component | Offset | Instance | Range |
---|---|---|---|
Debug | 0x034 | EDWAR | 63:32 |
This interface is accessible as follows:
- When IsCorePowered(), !DoubleLockStatus() and !OSLockStatus() accesses to this register are RO.
- Otherwise accesses to this register generate an error response.