GITS_CWRITER, ITS Write Register
The GITS_CWRITER characteristics are:
Specifies the offset from GITS_CBASER where software writes the next ITS command.
Bits [63:32] and bits [31:0] are accessible separately.
GITS_CWRITER is a 64-bit register.
The GITS_CWRITER bit assignments are:
Offset, bits [19:5]
Bits [19:5] of the offset from GITS_CBASER. Bits [4:0] of the offset are zero.
On a Warm reset, this field resets to an architecturally UNKNOWN value.
Retry, bit 
Writing this bit has the following effects:
No effect on the processing commands by the ITS.
Restarts the processing of commands by the ITS if it stalled because of a command error.
If the processing of commands is not stalled because of a command error, writing 1 to this bit has no effect.
When read, this bit is RES0.
For more information, see 'The ITS command interface' in ARM® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0 (ARM IHI 0069).
- The command queue is considered invalid, and no further commands are processed until GITS_CWRITER is written with a value that is in the valid range.
- The value is treated as a valid UNKNOWN value.
An implementation might choose to report a system error in an IMPLEMENTATION DEFINED manner.
Accessing the GITS_CWRITER
GITS_CWRITER can be accessed through the memory-mapped interfaces:
|GIC ITS control||0x0088||GITS_CWRITER|
This interface is accessible as follows:
- When GICD_CTLR.DS == 0 accesses to this register are RW.
- When an access is Secure accesses to this register are RW.
- When an access is Non-secure accesses to this register are RW.