TRCCIDR3, Component Identification Register 3
The TRCCIDR3 characteristics are:
Provides discovery information about the component.
For additional information, see the CoreSight Architecture Specification.
This register is present only when FEAT_ETE is implemented. Otherwise, direct accesses to TRCCIDR3 are RES0.
TRCCIDR3 is a 32-bit register.
The TRCCIDR3 bit assignments are:
PRMBL_3, bits [7:0]
Component identification preamble, segment 3.
Reads as 0xB1.
Accessing the TRCCIDR3
External debugger accesses to this register are unaffected by the OS Lock.
TRCCIDR3 can be accessed through the external debug interface:
This interface is accessible as follows:
- When !IsTraceCorePowered() accesses to this register generate an error response.
- Otherwise accesses to this register are RO.