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TRCCLAIMCLR, Claim Tag Clear Register

The TRCCLAIMCLR characteristics are:


In conjunction with TRCCLAIMSET, provides Claim Tag bits that can be separately set and cleared to indicate whether functionality is in use by a debug agent.

For additional information, see the CoreSight Architecture Specification.


External register TRCCLAIMCLR bits [31:0] are architecturally mapped to AArch64 System register TRCCLAIMCLR[31:0] .

This register is present only when FEAT_ETE is implemented. Otherwise, direct accesses to TRCCLAIMCLR are RES0.


TRCCLAIMCLR is a 32-bit register.

Field descriptions

The TRCCLAIMCLR bit assignments are:

CLR[<m>], bit [m], for m = 31 to 0

Claim Tag Clear. Indicates the current status of the Claim Tag bit m, and is used to clear Claim Tag bit m to 0b0.


On a read: Claim Tag bit m is not set.

On a write: Ignored.


On a read: Claim Tag bit m is set.

On a write: Clear Claim tag bit m to 0b0.

The number of Claim Tag bits implemented is indicated in TRCCLAIMSET.

This bit reads-as-zero and ignores writes if m > the number of Claim Tag bits.

On a Trace unit reset, this field resets to 0.

Accessing the TRCCLAIMCLR

TRCCLAIMCLR can be accessed through the external debug interface:


This interface is accessible as follows:

  • When OSLockStatus() or !IsTraceCorePowered() accesses to this register generate an error response.
  • Otherwise accesses to this register are RW.