TRCIMSPEC0, IMP DEF Register 0
The TRCIMSPEC0 characteristics are:
Purpose
TRCIMSPEC0 shows the presence of any IMPLEMENTATION DEFINED features, and provides an interface to enable the features that are provided.
Configuration
External register TRCIMSPEC0 bits [31:0] are architecturally mapped to AArch64 System register TRCIMSPEC0[31:0] .
This register is present only when FEAT_ETE is implemented. Otherwise, direct accesses to TRCIMSPEC0 are RES0.
Attributes
TRCIMSPEC0 is a 32-bit register.
Field descriptions
The TRCIMSPEC0 bit assignments are:
Bits [31:8]
Reserved, RES0.
EN, bits [7:4]
When TRCIMSPEC0.SUPPORT != 0b0000:
When TRCIMSPEC0.SUPPORT != 0b0000:
Enable. Controls whether the IMPLEMENTATION DEFINED features are enabled.
| EN | Meaning |
|---|---|
| 0b0000 |
The IMPLEMENTATION DEFINED features are not enabled. The trace unit must behave as if the IMPLEMENTATION DEFINED features are not supported. |
| 0b0001 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b0010 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b0011 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b0100 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b0101 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b0110 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b0111 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1000 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1001 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1010 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1011 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1100 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1101 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1110 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
| 0b1111 |
The trace unit behavior is IMPLEMENTATION DEFINED. |
On a Trace unit reset, this field resets to 0.
Otherwise:
Otherwise:
Reserved, RES0.
SUPPORT, bits [3:0]
Indicates whether the implementation supports IMPLEMENTATION DEFINED features.
| SUPPORT | Meaning |
|---|---|
| 0b0000 |
No IMPLEMENTATION DEFINED features are supported. |
| 0b0001 |
IMPLEMENTATION DEFINED features are supported. |
| 0b0010 |
IMPLEMENTATION DEFINED features are supported. |
| 0b0011 |
IMPLEMENTATION DEFINED features are supported. |
| 0b0100 |
IMPLEMENTATION DEFINED features are supported. |
| 0b0101 |
IMPLEMENTATION DEFINED features are supported. |
| 0b0110 |
IMPLEMENTATION DEFINED features are supported. |
| 0b0111 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1000 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1001 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1010 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1011 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1100 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1101 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1110 |
IMPLEMENTATION DEFINED features are supported. |
| 0b1111 |
IMPLEMENTATION DEFINED features are supported. |
Use of nonzero values requires written permission from Arm.
Access to this field is RO.
Accessing the TRCIMSPEC0
TRCIMSPEC0 can be accessed through the external debug interface:
| Component | Offset |
|---|---|
| ETE | 0x1C0 |
This interface is accessible as follows:
- When OSLockStatus(), or !AllowExternalTraceAccess() or !IsTraceCorePowered() accesses to this register generate an error response.
- Otherwise accesses to this register are RW.