TRCPIDR6, Peripheral Identification Register 6

The TRCPIDR6 characteristics are:

Purpose

Provides discovery information about the component.

For additional information, see the CoreSight Architecture Specification.

Configuration

This register is present only when FEAT_ETE is implemented. Otherwise, direct accesses to TRCPIDR6 are RES0.

Attributes

TRCPIDR6 is a 32-bit register.

Field descriptions

The TRCPIDR6 bit assignments are:

Bits [31:0]

Reserved, RES0.

Accessing the TRCPIDR6

External debugger accesses to this register are unaffected by the OS Lock.

TRCPIDR6 can be accessed through the external debug interface:

This interface is accessible as follows:

• When !IsTraceCorePowered() accesses to this register generate an error response.
• Otherwise accesses to this register are RO.