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TRCBBCTLR, Branch Broadcast Control Register

The TRCBBCTLR characteristics are:

Purpose

Controls the regions in the memory map where branch broadcasting is active.

Configuration

AArch64 System register TRCBBCTLR bits [31:0] are architecturally mapped to External register TRCBBCTLR[31:0] .

This register is present only when ETE is implemented, TRCIDR0.TRCBB == 0b1 and TRCIDR4.NUMACPAIRS > 0b0000. Otherwise, direct accesses to TRCBBCTLR are UNDEFINED.

Attributes

TRCBBCTLR is a 64-bit register.

Field descriptions

The TRCBBCTLR bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0
RES0MODERANGE<m>, bit [m]
313029282726252423222120191817161514131211109876543210

Bits [63:9]

Reserved, RES0.

MODE, bit [8]

Mode.

MODEMeaning
0b0

Exclude Mode.

Branch broadcasting is not active for instructions in the address ranges defined by RANGE.

If RANGE == 0x00 then branch broadcasting is active for all instructions.

0b1

Include Mode.

Branch broadcasting is active for instructions in the address ranges defined by RANGE.

If RANGE == 0x00 then the behavior of the trace unit is CONSTRAINED UNPREDICTABLE. That is, the trace unit might or might not consider any instructions to be in a branch broadcasting region.

On a Trace unit reset, this field resets to an architecturally UNKNOWN value.

RANGE<m>, bit [m], for m = 0 to 7

Address range field.

Selects which Address Range Comparators are in use with branch broadcasting.

RANGE<m>Meaning
0b0

The address range that Address Range Comparator m defines, is not selected.

0b1

The address range that Address Range Comparator m defines, is selected.

This bit is RES0 if m >= TRCIDR4.NUMACPAIRS.

On a Trace unit reset, this field resets to an architecturally UNKNOWN value.

Accessing the TRCBBCTLR

Must be programmed if TRCCONFIGR.BB == 0b1.

Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.

Accesses to this register use the following encodings:

MRS <Xt>, TRCBBCTLR

op0op1CRnCRmop2
0b100b0010b00000b11110b000
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if CPACR_EL1.TTA == '1' then
        AArch64.SystemAccessTrap(EL1, 0x18);
    elsif EL2Enabled() && !ELUsingAArch32(EL2) && CPTR_EL2.TTA == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() && !ELUsingAArch32(EL2) && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HDFGRTR_EL2.TRC == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return TRCBBCTLR;
elsif PSTATE.EL == EL2 then
    if CPTR_EL2.TTA == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return TRCBBCTLR;
elsif PSTATE.EL == EL3 then
    if CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return TRCBBCTLR;
              

MSR TRCBBCTLR, <Xt>

op0op1CRnCRmop2
0b100b0010b00000b11110b000
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if CPACR_EL1.TTA == '1' then
        AArch64.SystemAccessTrap(EL1, 0x18);
    elsif EL2Enabled() && !ELUsingAArch32(EL2) && CPTR_EL2.TTA == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() && !ELUsingAArch32(EL2) && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HDFGWTR_EL2.TRC == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        TRCBBCTLR = X[t];
elsif PSTATE.EL == EL2 then
    if CPTR_EL2.TTA == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        TRCBBCTLR = X[t];
elsif PSTATE.EL == EL3 then
    if CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        TRCBBCTLR = X[t];
              


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