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TRCOSLSR, Trace OS Lock Status Register

The TRCOSLSR characteristics are:

Purpose

Returns the status of the Trace OS Lock.

Configuration

AArch64 System register TRCOSLSR bits [31:0] are architecturally mapped to External register TRCOSLSR[31:0] .

This register is present only when ETE is implemented. Otherwise, direct accesses to TRCOSLSR are UNDEFINED.

Attributes

TRCOSLSR is a 64-bit register.

Field descriptions

The TRCOSLSR bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0
RES0OSLM[2:1]RES0OSLKOSLM[0]
313029282726252423222120191817161514131211109876543210

Bits [63:5]

Reserved, RES0.

OSLM[2:1], bits [4:3]

This field is bits[2:1] of OSLM[2:0].

OS Lock model.

OSLMMeaning
0b000

Trace OS Lock is not implemented.

0b010

Trace OS Lock is implemented.

0b100

Trace OS Lock is not implemented, and the trace unit is controlled by the PE OS Lock.

All other values are reserved.

This field reads as 0b100.

The OSLM field is split as follows:

  • OSLM[2:1] is TRCOSLSR[4:3].
  • OSLM[0] is TRCOSLSR[0].

Bit [2]

Reserved, RES0.

OSLK, bit [1]

OS Lock status.

OSLKMeaning
0b0

The OS Lock is unlocked.

0b1

The OS Lock is locked.

Note that this field indicates the state of the PE OS Lock.

OSLM[0], bit [0]

This field is bit[0] of OSLM[2:0].

See OSLM[2:1] for the field description.

Accessing the TRCOSLSR

Accesses to this register use the following encodings:

MRS <Xt>, TRCOSLSR

op0op1CRnCRmop2
0b100b0010b00010b00010b100
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if CPACR_EL1.TTA == '1' then
        AArch64.SystemAccessTrap(EL1, 0x18);
    elsif EL2Enabled() && !ELUsingAArch32(EL2) && CPTR_EL2.TTA == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() && !ELUsingAArch32(EL2) && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HDFGRTR_EL2.TRCOSLSR == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return TRCOSLSR;
elsif PSTATE.EL == EL2 then
    if CPTR_EL2.TTA == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return TRCOSLSR;
elsif PSTATE.EL == EL3 then
    if CPTR_EL3.TTA == '1' then
        AArch64.SystemAccessTrap(EL3, 0x18);
    else
        return TRCOSLSR;
              


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