AMCIDR0, Activity Monitors Component Identification Register 0
The AMCIDR0 characteristics are:
Provides information to identify an activity monitors component.
For more information, see About the Component identification scheme in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.
The power domain of AMCIDR0 is IMPLEMENTATION DEFINED.
Implementation of this register is OPTIONAL.
This register is present only when AMUv1 is implemented. Otherwise, direct accesses to AMCIDR0 are RES0.
AMCIDR0 is a 32-bit register.
The AMCIDR0 bit assignments are:
PRMBL_0, bits [7:0]
Preamble. Must read as 0x0D.
Accessing the AMCIDR0
AMCIDR0 can be accessed through the memory-mapped interfaces:
Accesses on this interface are RO.