EDDEVID1, External Debug Device ID register 1
The EDDEVID1 characteristics are:
Purpose
Provides extra information for external debuggers about features of the debug implementation.
Configuration
It is IMPLEMENTATION DEFINED whether EDDEVID1 is implemented in the Core power domain or in the Debug power domain.
If ARMv8.3-DoPD is implemented, this register is in the Core power domain. If ARMv8.3-DoPD is not implemented, this register is in the Debug power domain.
Attributes
EDDEVID1 is a 32-bit register.
Field descriptions
The EDDEVID1 bit assignments are:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | PCSROffset | ||||||||||||||||||||||||||||||
Bits [31:4]
Reserved, RES0.
PCSROffset, bits [3:0]
This field indicates the offset applied to PC samples returned by reads of EDPCSR. Permitted values of this field in Armv8 are:
| PCSROffset | Meaning |
|---|---|
| 0b0000 |
EDPCSR not implemented. |
| 0b0010 |
EDPCSR implemented, and samples have no offset applied and do not sample the instruction set state in AArch32 state. |
When ARMv8.2-PCSample is implemented, the only permitted value is 0b0000.
ARMv8.2-PCSample implements the PC Sample-based Profiling Extension in the Performance Monitors register space, as indicated by the value of PMDEVID.PCSample.
Accessing the EDDEVID1
EDDEVID1 can be accessed through the external debug interface:
| Component | Offset | Instance |
|---|---|---|
| Debug | 0xFC4 | EDDEVID1 |
This interface is accessible as follows:
- When ARMv8.3-DoPD is not implemented or IsCorePowered() accesses to this register are RO.
- Otherwise accesses to this register generate an error response.