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TRCCIDR2, Component Identification Register 2

The TRCCIDR2 characteristics are:

Purpose

Provides discovery information for the component.

For additional information see the CoreSight Architecture Specification.

Configuration

This register is present only when ETE is implemented. Otherwise, direct accesses to TRCCIDR2 are RES0.

There are no configuration notes.

Attributes

TRCCIDR2 is a 32-bit register.

Field descriptions

The TRCCIDR2 bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0PRMBL_2

Bits [31:8]

Reserved, RES0.

PRMBL_2, bits [7:0]

Component identification preamble, segment 2.

This field reads as 0x05.

Accessing the TRCCIDR2

External debugger accesses to this register are unaffected by the OS Lock.

TRCCIDR2 can be accessed through the external debug interface:

ComponentOffset
ETE0xFF8

This interface is accessible as follows:

  • When !IsTraceCorePowered() accesses to this register generate an error response.
  • Otherwise accesses to this register are RO.


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