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TRCITCTRL, Integration Mode Control Register

The TRCITCTRL characteristics are:

Purpose

A component can use TRCITCTRL to dynamically switch between functional mode and integration mode. In integration mode, topology detection is enabled. After switching to integration mode and performing integration tests or topology detection, reset the system to ensure correct behavior of CoreSight and other connected system components.

For additional information see the CoreSight Architecture Specification.

Configuration

This register is present only when ETE is implemented. Otherwise, direct accesses to TRCITCTRL are RES0.

There are no configuration notes.

Attributes

TRCITCTRL is a 32-bit register.

Field descriptions

The TRCITCTRL bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0IME

Bits [31:1]

Reserved, RES0.

IME, bit [0]

Integration Mode Enable.

IMEMeaning
0b0

The component must enter functional mode.

0b1

The component must enter integration mode, and enable support for topology detection and integration testing.

This bit is RES0 if no topology detection or integration functionality is implemented.

Accessing the TRCITCTRL

External debugger accesses to this register are IMPLEMENTATION DEFINED when the trace unit is not in the Idle state.

TRCITCTRL can be accessed through the external debug interface:

ComponentOffset
ETE0xF00

This interface is accessible as follows:

  • When !AllowExternalTraceAccess(), or OSLockStatus() or !IsTraceCorePowered() accesses to this register generate an error response.
  • Otherwise accesses to this register are RW.


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