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AES inverse mix columns.

The AESIMC instruction reads a 16-byte state array from each 128-bit segment of the source register, and performs a single round of the InvMixColumns() transformation on each state array in accordance with the AES standard. Each updated state array is destructively placed in the corresponding segment of the first source vector. This instruction is unpredicated.



AESIMC <Zdn>.B, <Zdn>.B

if !HaveSVE2AES() then UNDEFINED;
integer dn = UInt(Zdn);

Assembler Symbols


Is the name of the source and destination scalable vector register, encoded in the "Zdn" field.


integer segments = VL DIV 128;
bits(VL) operand = Z[dn];
bits(VL) result;

for s = 0 to segments-1
    Elem[result, s, 128] = AESInvMixColumns(Elem[operand, s, 128]);

Z[dn] = result;