Arm® A64 Instruction Set Architecture: Future Architecture Technologies in the A architecture profile | FMOV (zero, predicated): Move floating-point +0.0 to vector elements (predicated): an alias of CPY (immediate).

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FMOV (zero, predicated)

Move floating-point +0.0 to vector elements (predicated).

Move floating-point constant +0.0 to to each active element in the destination vector. Inactive elements in the destination vector register remain unmodified.

This is a pseudo-instruction of CPY (immediate). This means:

The encodings in this description are named to match the encodings of CPY (immediate).
The assembler syntax is used only for assembly, and is not used on disassembly.
The description of CPY (immediate) gives the operational pseudocode for this instruction.

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	size		0	1	Pg				0	1	0	0	0	0	0	0	0	0	0	Zd
																	M	sh	imm8

SVE

FMOV <Zd>.<T>, <Pg>/M, #0.0

is equivalent to

CPY <Zd>.<T>, <Pg>/M, #0

Assembler Symbols

<Zd>	Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size	<T>
00	RESERVED
01	H
10	S
11	D

<Pg>	Is the name of the governing scalable predicate register, encoded in the "Pg" field.

Operation

The description of CPY (immediate) gives the operational pseudocode for this instruction.

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