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## PMUL

Polynomial Multiply. This instruction multiplies corresponding elements in the vectors of the two source SIMD&FP registers, places the results in a vector, and writes the vector to the destination SIMD&FP register.

For information about multiplying polynomials see Polynomial arithmetic over {0, 1}.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 Q 1 0 1 1 1 0 size 1 Rm 1 0 0 1 1 1 Rn Rd U

#### Three registers of the same type

PMUL <Vd>.<T>, <Vn>.<T>, <Vm>.<T>

```integer d = UInt(Rd);
integer n = UInt(Rn);
integer m = UInt(Rm);
if U == '1' && size != '00' then UNDEFINED;
if size == '11' then UNDEFINED;
integer esize = 8 << UInt(size);
integer datasize = if Q == '1' then 128 else 64;
integer elements = datasize DIV esize;

boolean poly = (U == '1');```

### Assembler Symbols

 Is the name of the SIMD&FP destination register, encoded in the "Rd" field.
<T> Is an arrangement specifier, encoded in size:Q:
size Q <T>
00 0 8B
00 1 16B
01 x RESERVED
1x x RESERVED
 Is the name of the first SIMD&FP source register, encoded in the "Rn" field.
 Is the name of the second SIMD&FP source register, encoded in the "Rm" field.

### Operation

```CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(datasize) operand2 = V[m];
bits(datasize) result;
bits(esize) element1;
bits(esize) element2;
bits(esize) product;

for e = 0 to elements-1
element1 = Elem[operand1, e, esize];
element2 = Elem[operand2, e, esize];
if poly then
product = PolynomialMult(element1, element2)<esize-1:0>;
else
product = (UInt(element1)*UInt(element2))<esize-1:0>;
Elem[result, e, esize] = product;

V[d] = result;```

### Operational information

If PSTATE.DIT is 1:

• The execution time of this instruction is independent of:
• The values of the data supplied in any of its registers.
• The values of the NZCV flags.
• The response of this instruction to asynchronous exceptions does not vary based on:
• The values of the data supplied in any of its registers.
• The values of the NZCV flags.