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Home Documentation ddi0602 b - Arm® A64 Instruction Set Architecture: Future Architecture Technologies in the A architecture profile Top level encodings for A64

Arm® A64 Instruction Set Architecture: Future Architecture Technologies in the A architecture profile

Developer Documentation

  • Arm® A64 Instruction Set Architecture: Future Architecture Technologies in the A architecture profile
    • Base Instructions (alphabetic order)
    • SIMD and Floating-point Instructions (alphabetic order)
    • A64 -- SVE Instructions (alphabetic order)
    • Top level encodings for A64
      • Reserved
      • Data Processing -- Immediate
      • Data Processing -- Register
    • Shared Pseudocode Functions
    • Proprietary Notice
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Top-level encodings for A64

313029282726252423222120191817161514131211109876543210
op0
Decode fields Instruction details
op0
0000 Reserved
0001 UNALLOCATED
0010 SVE encodings
0011 UNALLOCATED
100x Data Processing -- Immediate
101x Branches, Exception Generating and System instructions
x1x0 Loads and Stores
x101 Data Processing -- Register
x111 Data Processing -- Scalar Floating-Point and Advanced SIMD
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