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SEL (predicates)
Conditionally select elements from two predicates.
Read active elements from the first source predicate and inactive elements from the second source predicate and place in the corresponding elements of the destination predicate. Does not set the condition flags.
This instruction is used by the alias MOV (predicate, predicated, merging).
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | Pm | 0 | 1 | Pg | 1 | Pn | 1 | Pd |
if !HaveSVE() then UNDEFINED; integer esize = 8; integer g = UInt(Pg); integer n = UInt(Pn); integer m = UInt(Pm); integer d = UInt(Pd);
Assembler Symbols
<Pd> |
Is the name of the destination scalable predicate register, encoded in the "Pd" field. |
<Pg> |
Is the name of the governing scalable predicate register, encoded in the "Pg" field. |
<Pn> |
Is the name of the first source scalable predicate register, encoded in the "Pn" field. |
<Pm> |
Is the name of the second source scalable predicate register, encoded in the "Pm" field. |
Alias Conditions
Alias | Is preferred when |
---|---|
MOV (predicate, predicated, merging) | Pd == Pm |
Operation
CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(PL) operand1 = P[n]; bits(PL) operand2 = P[m]; bits(PL) result; for e = 0 to elements-1 bit element1 = ElemP[operand1, e, esize]; bit element2 = ElemP[operand2, e, esize]; if ElemP[mask, e, esize] == '1' then ElemP[result, e, esize] = element1; else ElemP[result, e, esize] = element2; P[d] = result;
Operational information
If PSTATE.DIT is 1:
- The execution time of this instruction is independent of:
- The values of the data supplied in any of its operand registers when its governing predicate register contains the same value for each execution.
- The values of the NZCV flags.
- The response of this instruction to asynchronous exceptions does not vary based on:
- The values of the data supplied in any of its operand registers when its governing predicate register contains the same value for each execution.
- The values of the NZCV flags.