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CPY (SIMD&FP scalar)

Copy SIMD&FP scalar register to vector elements (predicated).

Copy the SIMD & floating-point scalar source register to each active element in the destination vector. Inactive elements in the destination vector register remain unmodified.

This instruction is used by the alias MOV (SIMD&FP scalar, predicated).

313029282726252423222120191817161514131211109876543210
00000101size100000100PgVnZd
if !HaveSVE() then UNDEFINED;
integer esize = 8 << UInt(size);
integer g = UInt(Pg);
integer n = UInt(Vn);
integer d = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T> Is the size specifier, encoded in size:
size <T>
00 B
01 H
10 S
11 D
<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<V> Is a width specifier, encoded in size:
size <V>
00 B
01 H
10 S
11 D
<n>

Is the number [0-31] of the source SIMD&FP register, encoded in the "Vn" field.

Operation

CheckSVEEnabled();
integer elements = VL DIV esize;
bits(PL) mask = P[g];
bits(esize) operand1 = V[n];
bits(VL) result = Z[d];

for e = 0 to elements-1
    if ElemP[mask, e, esize] == '1' then
        Elem[result, e, esize] = operand1;

Z[d] = result;

Operational information

If PSTATE.DIT is 1:

  • The execution time of this instruction is independent of:
    • The values of the data supplied in any of its operand registers when its governing predicate register contains the same value for each execution.
    • The values of the NZCV flags.
  • The response of this instruction to asynchronous exceptions does not vary based on:
    • The values of the data supplied in any of its operand registers when its governing predicate register contains the same value for each execution.
    • The values of the NZCV flags.

This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:

  • The MOVPRFX instruction must be unpredicated, or be predicated using the same governing predicate register and source element size as this instruction.
  • The MOVPRFX instruction must specify the same destination register as this instruction.
  • The destination register must not refer to architectural register state referenced by any other source operand register of this instruction.