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TST (immediate)

Test bits (immediate), setting the condition flags and discarding the result: Rn AND imm.

This is an alias of ANDS (immediate). This means:

  • The encodings in this description are named to match the encodings of ANDS (immediate).
  • The description of ANDS (immediate) gives the operational pseudocode for this instruction.

313029282726252423222120191817161514131211109876543210
sf11100100NimmrimmsRn11111
opcRd

32-bit (sf == 0 && N == 0)

TST <Wn>, #<imm>

is equivalent to

ANDS WZR, <Wn>, #<imm>

and is always the preferred disassembly.

64-bit (sf == 1)

TST <Xn>, #<imm>

is equivalent to

ANDS XZR, <Xn>, #<imm>

and is always the preferred disassembly.

Assembler Symbols

<Wn>

Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<Xn>

Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

<imm>

For the 32-bit variant: is the bitmask immediate, encoded in "imms:immr".

For the 64-bit variant: is the bitmask immediate, encoded in "N:imms:immr".

Operation

The description of ANDS (immediate) gives the operational pseudocode for this instruction.

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