The AArch64 execution state provides 31 × 64-bit general-purpose registers accessible at all times and in all Exception levels.
Each register is 64 bits wide and they are generally referred to as registers X0-X30.
Each AArch64 64-bit general-purpose register (X0-X30) also has a 32-bit (W0-W30) form.
The 32-bit W register forms the lower half of the corresponding 64-bit X register. That is, W0 maps onto the lower word of X0, and W1 maps onto the lower word of X1.
Reads from W registers disregard the higher 32 bits of the
corresponding X register and leave them unchanged. Writes to W registers
set the higher 32 bits of the X register to zero. That is, writing
W0 sets X0 to