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1.10. Interface diagram and signal list

Figure 10 shows the signal interface for the BusMatrix.

Figure 10. Signal interface diagram

Signal interface diagram

Table 1 shows a list of the interface signals used by the BusMatrix. An identical set of signals can be found on each of the input ports and each of the slave output ports.

Name

Direction

Description

AMBA signals

  HCLK

Input

Bus clock

  HRESETn

Input

Reset

Input port signals

  HSELSx

Input

Input port x select signal

  HADDRSx[31:0]

Input

Input port x address

  HTRANSSx[1:0]

Input

Input port x transfer type

  HWRITESx

Input

Input port x transfer direction

  HSIZESx[2:0]

Input

Input port x transfer size

  HBURSTSx[2:0]

Input

Input port x burst type

  HPROTSx[3:0]

Input

Input port x protection control

  HWDATASx[31:0]

Input

Input port x write data

  HMASTLOCKSx

Input

Input port x locked transfer

  HREADYSx

Input

Input port x ready signal

  HRDATASx[31:0]

Output

Input port x read data

  HREADYOUTSx

Output

Input port x ready output

  HRESPSx[1:0]

Output

Input port x response

Output port signals

  HSELMx

Output

Output port x select signal

  HADDRMx[31:0]

Output

Output port x address

  HTRANSMx[1:0]

Output

Output port x transfer type

  HWRITEMx

Output

Output port x transfer direction

  HSIZEMx[2:0]

Output

Output port x transfer size

  HBURSTMx[2:0]

Output

Output port x burst type

  HPROTMx[3:0]

Output

Output port x protection control

  HWDATAMx[31:0]

Output

Output port x write data

  HMASTLOCKMx

Output

Output port x locked transfer

  HREADYMx

Output

Output port x ready signal

  HRDATAMx[31:0]

Input

Output port x read data

  HREADYOUTMx

Input

Output port x ready output

  HRESPMx[1:0]

Input

Output port x response

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