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A.1. EXPA

Figure A.1 shows the pin numbers of the EXPA socket. The socket is viewed as if looking down through the stack.

Figure A.1. EXPA socket pin numbering

EXPA socket pin numbering

The signals present on the EXPA connector are described in Table A.1.

AHB signal assignment

Pin label

Signal

Description

A[31:0]

Not used-

B[31:0]

B[31:0]

These signals connect to the FPGA on the logic module. They are used to carry the GIPOB[31:0] signals.

C[31:0]

Not used

-

D[31:0]Not used-
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