The Peripheral Information Block (PIB) is a block of 32 words in ROM that provides you with information about the peripherals used in the design. The PIB is located at the top of the address space for the logic module.
Each word in the PIB provides information about one peripheral.
A value of
0x00000000 indicates that there is
no entry and that the next address must be checked. Each valid entry
contains the information shown in Table 4.18.
Bits [27:20] of the peripheral base address.
Bits [31:28] of the address are defined by the location of the logic module in the stack see Address assignment of logic modules.
For a PrimeCell, this is the PrimeCell
number in BCD. For example, the VIC PrimeCell PL190 would be represented by
other peripherals the value
|7:0||Peripheral Rev||This gives the revision number of the peripheral
in BCD. For example, revision v1.2 is represented by |
The last address of the PIB is used to store the FPGA build number. Bits [31:8] are all 1 and bits [7:0] store the revision number in BCD.
Use the ARM executable utility
supplied on the IM-AD1 CD, to display the PIB information.