The stripe internal components are shown in Figure 4.3 and include:
128KB Dual port RAM.
SDRAM controller for off-chip SDRAM
Expansion Bus Interface (EBI)
Phase Locked Loop (PLL)
AHB master and slave bridges to the PLD
These devices and their control registers are described in the Excalibur ARM-Based Embedded Processor PLD Hardware Reference Manual.
These functional blocks within the stripe enable the core, independently of the PLD configuration, to carry out the following functions:
access external boot memory
boot and run a program
program the PLD
run interactive debug
detect errors and restart, reboot, or reprogram the system as required
communicate with a terminal
run a real-time operating system.