The JTAG signals for the FPGA on the Logic Tile are routed through the tile headers to the boards above and below the tile. There is not a JTAG connector on the Logic Tile. Use the Multi-ICE 20-way box header on the Versatile/PB926EJ-S platform baseboard or on an interface board (such as an Integrator/IM-LT1 Interface Module).
If multiple Logic Tiles are stacked on an Interface Module, the JTAG equipment is always connected to the Interface Module and the signals are routed upwards to the top tile and then back down to the Interface Module. See the Multi-ICE section in the Integrator IM-LT1 User Guide for details.
Use Multi-ICE to program the configuration flash or directly load the FPGA image.
Third-party JTAG tools such as the Xilinx parallel cable can be used by connecting them to the 20-way box header.
Although third-party tools can be used to program a configuration directly into the FPGA, they cannot program an image into the flash memory.