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2.2.1. Boot memory configuration

The configuration switches S1-1 to S1-8 determine boot memory type, the FPGA image, and the Logic Tile image, memory configuration, and FPGA options at power on.

Use switch S1-1 and S1-2 to select the boot device as shown in Table 2.1.

Note

If the switch lever is down, the switch is ON. The default is OFF, switch lever up.

Table 2.1. Selecting the boot device
S1-2S1-1Device
OFFOFFReserved (boot from NOR flash 2 - default setting)
OFF ONNOR flash 1, see Booting from NOR flash 1
ONOFFReserved
ONONAHB expansion memory, see Booting from AHB expansion memory

Configuration switches S1-1 to S1-8 are not normally changed from their factory default positions listed in Table 2.2. For more information on configuration switch S1, see Configuration control.

Table 2.2. Default switch positions
SwitchDefaultFunction in default position
S1-1 and S1-2OFF

Selects NOR flash 2 as boot memory

S1-3OFF

Selects synchronous AHB bridge mode.

S1-4OFF

Reserved (SSMC enabled), leave in OFF position

S1-5OFF

Selects OSCCLK frequency of 35MHz.

S1-6 and S1-7OFF

Selects PB926EJ-S FPGA image 0

S1-8OFF

Selects Logic Tile FPGA image 0


Note

For information on other configuration links see Test, configuration, and debug interfaces. For the function of the status LEDs see Table 2.3,

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