The ARM926PXP development chip contains a PrimeCell SSP controller that is accessible from the peripheral expansion connector as shown in Figure 3.28.
Chip select to external device connected to SSP controller (see CLCD Control Register, SYS_CLCD)
PrimeCell SSP clock output to peripheral interface board
PrimeCell SSP receive data input.
PrimeCell SSP transmit data output
|Chip select to peripheral interface board (see CLCD Control Register, SYS_CLCD)|
|Keypad interrupt signal from interface board|
|Pen interrupt signal from interface board|
|Data available from interface board (see CLCD Control Register, SYS_CLCD)|
The SSP functions as a master interface.See also Synchronous Serial Port, SSP and the ARM PrimeCell Synchronous Serial Port Controller (PL022) Technical Reference Manual.