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4.14. AXI to PCI bridge

The AXI to PCI bridge is implemented in the Northbridge.

Table 4.42. AXI to PCI bridge implementation
PropertyValue
Location Northbridge
Memory base address

0x90000000

0x60000000 (reserved for PCI expansion)

Interrupt

82 P_nINT[0]

83 P_nINT[1]

84 P_nINT[2]

85 P_nINT[3]

DMANone. Memory to memory transfers can be set up in the DMAC.
Release versionNEC (AXI2PCI)
Reference documentation

The windows that provide access to the PCI expansion bus are listed in Table 4.43.

Table 4.43. PCI bus memory map
UsageAddress
AXI2PCI0x90040000
PCI I/O window0x90050000 to 0x9005FFFF
PCI Memory window0xA0000000 to 0xBFFFFFFF

The AXI to PCI bridge enables you to use the PB11MPCore with third-party PCI or PCI-Express expansion cards. PB11MPCore functions as a PCI host, that is, it generates clocks to the PCI or PCI-Express card.

The Northbridge AXI to PCI bridge recognizes accesses to addresses 0x90000000 to 0xBFFFFFFF within the memory map as being intended for a target within PCI address space. There is also an additional region from 0x60000000 to 0x6FFFFFFF that is reserved for PCI expansion if required.

Note

Only one PCI bus may use the I/O window at a time, as it is 4KB aligned.

PCI bridge initialization and configuration routines are included as part of the selftest suite on the Versatile Family CD.

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