Exception handling process
The exception handling model used by ARMv7-A, ARMv7-R, ARMv6 and earlier architectures is different from the model used by the microcontroller profiles ARMv7-M and ARMv6-M.
This description applies to ARMv7 and earlier architectures. Some of the differences in ARMv7-M and ARMv6-M are also highlighted. The following figure shows the exception handling process.
Figure 5-1 Handling an exception
When an exception occurs, control passes through an area of memory called the vector table. This is a reserved area usually at the bottom of the memory map. Within the table one word is allocated to each of the various exception types. This word contains either a form of a branch instruction or, in the case of ARMv7-M and ARMv6-M, an address to the relevant exception handler.
You can write the exception handlers in either ARM or Thumb code if the
processor supports the respective instruction set. For the ARMv7-M and ARMv6-M profiles, the
processor enters the exception handler that is specified in the vector table. For all other
ARM processors, you must branch from the top-level handler to the code that handles the
exception. Use a Branch and exchange (
BX) if state change is required. When handling exceptions, the current processor
mode, state, and registers must be preserved so that the program can resume when the
appropriate exception handling routine completes.