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Unaligned Load Register (LDR) instructions generated by the compiler

In some circumstances, the compiler might intentionally generate unaligned LDR instructions. In particular, the compiler can do this to load halfwords from memory, even where the architecture supports dedicated halfword load instructions.

For example, to access an unaligned short within a __packed structure, the compiler might load the required halfword into the top half of a register and then shift it down to the bottom half. This operation requires only one memory access, whereas performing the same operation using LDRB instructions requires two memory accesses, plus instructions to merge the two bytes.

See also


Assembler Reference:

Compiler Reference:

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