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Floating-point linkage and computational requirements of compiler options
There are various valid combinations of FPU options and processors.
The following table sets out the FPU options, and their capabilities and requirements.
Table 5-14 FPU-option capabilities and requirements
FPU name |
Hardware FP linkage | d0-d15 registers | d16-d31 registers | VFP instructions | Half precision | Single precision | Double precision |
---|---|---|---|---|---|---|---|
softvfp |
No | No | No | No | No | No | No |
softvfp+vfpv2 |
No | Yes | No | Yes | No | Yes | Yes |
softvfp+vfpv3 |
No | Yes | Yes | Yes | No | Yes | Yes |
softvfp+vfpv3_fp16 |
No | Yes | Yes | Yes | Yes | Yes | Yes |
softvfp+vfpv3_d16 |
No | Yes | No | Yes | No | Yes | Yes |
softvfp+vfpv3_d16_fp16 |
No | Yes | No | Yes | Yes | Yes | Yes |
softvfp+vfpv3_sp_d16 |
No | Yes | No | Yes | Yes | Yes | No |
softvfp+vfpv4 |
No | Yes | Yes | Yes | Yes | Yes | Yes |
softvfp+vfpv4_d16 |
No | Yes | No | Yes | Yes | Yes | Yes |
softvfp+vfpv4_sp_d16 |
No | Yes | No | Yes | Yes | Yes | No |
softvfp+fpv4-sp |
No | Yes | No | Yes | Yes | Yes | No |
vfp |
Yes | Yes | No | Yes | No | Yes | Yes |
vfpv2 |
Yes | Yes | No | Yes | No | Yes | Yes |
vfpv3 |
Yes | Yes | Yes | Yes | No | Yes | Yes |
vfpv3_fp16 |
Yes | Yes | Yes | Yes | Yes | Yes | Yes |
vfpv3_d16 |
Yes | Yes | No | Yes | No | Yes | Yes |
vfpv3_d16_fp16 |
Yes | Yes | No | Yes | Yes | Yes | Yes |
vfpv3_sp_d16 |
Yes | Yes | No | Yes | Yes | Yes | No |
vfpv4 |
Yes | Yes | Yes | Yes | Yes | Yes | Yes |
vfpv4_d16 |
Yes | Yes | No | Yes | Yes | Yes | Yes |
vfpv4_sp_d16 |
Yes | Yes | No | Yes | Yes | Yes | No |
fpv4-sp |
Yes | Yes | No | Yes | Yes | Yes | No |
Note
You can specify the floating-point linkage, independently of the VFP architecture, with
--apcs
.