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Vectors in the VFP extension register bank

For vector operations, the VFP extension register bank can be viewed as a collection of smaller banks. Each of these smaller banks is treated either as a bank of 8 single-precision registers or as a bank of 4 double-precision registers.

In VFPv2, VFPv3-D16, and VFPv3-D16-FP16 the VFP extension register bank can be viewed as a collection of:

  • four banks of single-precision registers, s0 to s7, s8 to s15, s16 to s23, and s24 to s31

  • four banks of double-precision registers, d0 to d3, d4 to d7, d8 to d11, and d12 to d15

  • any combination of single-precision and double-precision banks.

In VFPv3 and VFPv3-FP16, the VFP extension register bank can be viewed as a collection of:

  • four banks of single-precision registers, s0 to s7, s8 to s15, s16 to s23, and s24 to s31

  • Eight banks of double-precision registers, d0 to d3, d4 to d7, d8 to d11, d12 to d15, d16 to d19, d20 to d23, d24 to d27, and d28 to d31

  • any combination of single-precision and double-precision banks.

See Figure 3 and Figure 4 for further clarification.

Figure 3. VFPv2 register banks

Figure 3. VFPv2 register banks

Figure 4. VFPv3 register banks

Figure 4. VFPv3 register banks

A vector, in a VFP instruction, can use up to eight single-precision registers, or four double-precision registers, from the same bank. The number of registers used by a vector is controlled by the LEN bits in the FPSCR.

Note

The value of the LEN bits is not a sufficient condition to perform vector operations using VFP. Whether a VFP operation is scalar, vector or mixed depends on which bank the specified operand and destination registers are in.

A vector can start from any register and wraps around to the beginning of the bank. The first register used by an operand vector is the register that is specified as the operand in the individual VFP instructions. The first register used by the destination vector is the register that is specified as the destination in the individual VFP instructions.

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