The instructions that can be conditional have an optional
condition code, shown in syntax descriptions as
This condition is encoded in ARM instructions, and encoded in a preceding
for Thumb instructions. An instruction with a condition code is
only executed if the condition code flags in the APSR meet the specified
In Thumb state on processors before ARMv6T2, the
is only permitted on certain branch instructions because there is
IT instruction on these processors.
The following table shows the condition codes that you can use and the flags they depend on.
|Higher or same (unsigned >= )|
|Lower (unsigned < )|
|Positive or zero|
|Higher (unsigned >)|
|Lower or same (unsigned <=)|
|Any||Always. This suffix is normally omitted.|
The following is an example of conditional execution.
ADD r0, r1, r2 ; r0 = r1 + r2, don't update flags ADDS r0, r1, r2 ; r0 = r1 + r2, and update flags ADDSCS r0, r1, r2 ; If C flag set then r0 = r1 + r2, and update flags CMP r0, r1 ; update flags based on r0-r1.