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Predeclared XScale register names

The following register names are predeclared when assembling for a Marvell XScale CPU:

Table 4. Predeclared XScale registers

Register name


acc0-acc7 and ACC0-ACC7

XScale accumulator registers

The following register names are predeclared when assembling for a Marvell XScale CPU with Wireless MMX:

Table 5. Predeclared Wireless MMX registers

Register name


wR0-wR15, wr0-wr15, and WR0-WR15

Wireless SIMD data registers (coprocesssor 0).

wC0-wC15, wc0-wc15, and WC0-WC15

Usable aliases for coprocessor 1 registers. Use of these aliases is not recommended.

wCID, wcid, and WCID

Coprocessor ID register (coprocessor 1 register c0).

wCon, wcon, and WCON

Control register (coprocessor 1 register c1).

wCSSF, wcssf, and WCSSF

Saturation SIMD flags (coprocessor 1 register c2).

wCASF, wcasf, and WCASF

Arithmetic SIMD flags (coprocessor 1 register c3).

wCGR0-wCGR3, wcgr0-wcgr3, and WCGR0-WCGR3

General purpose registers (coprocessor 1 registers c8 - c11).

The register names are case-sensitive and can be mixed case where this matches exactly the Wireless MMX Technology specification.

Control registers, ID register, general-purpose registers wCGR0 - wCGR3 and the SIMD flags map onto coprocessor 1. Use the Wireless MMX Technology instructions TMCR and TMRC to read and write to these registers. The coprocessor 1 registers c4-c7 and c12-c15 are reserved.

SIMD data registers (wR0 - wR15) map onto coprocessor 0 and hold 16x64-bit packed data. Use the Wireless MMX Technology pseudo-instructions TMRRC and TMCRR to move data between these registers and the ARM registers.

The assembler supports the WRN and WCN directives to specify your own register names.

See also


Assembler Reference:

Wireless MMX Technology Developer Guide.

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