Bit Field Clear.
is an optional condition code.
is the destination register.
is the least significant bit that is to be cleared.
is the number of bits to be cleared.
widthmust not be 0, and (
lsb) must be less than 32.
Clears adjacent bits in a register.
width bits in
Rd are cleared, starting at
lsb. Other bits in
Rd are unchanged.
You cannot use PC for any register.
You can use SP in the
BFC ARM instruction
but this is deprecated in ARMv6T2 and above. You cannot use SP in
BFC Thumb instruction.
BFC instruction does not change
This ARM instruction is available in ARMv6T2 and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above.
There is no 16-bit version of this instruction in Thumb.