Data Synchronization Barrier.
is an optional condition code.
condis permitted only in Thumb code. This is an unconditional instruction in ARM.
is an optional limitation on the operation of the hint. Permitted values are:
DSBoperation. This is the default and can be omitted.
DSBoperation that waits only for stores to complete.
DSBoperation only to the inner shareable domain.
DSBoperation that waits only for stores to complete, and only to the inner shareable domain.
DSBoperation only out to the point of unification.
DSBoperation that waits only for stores to complete and only out to the point of unification.
DSBoperation only to the outer shareable domain.
DSBoperation that waits only for stores to complete, and only to the outer shareable domain.
Data Synchronization Barrier acts as a special kind of memory barrier. No instruction in program order after this instruction executes until this instruction completes. This instruction completes when:
All explicit memory accesses before this instruction complete.
All Cache, Branch predictor and TLB maintenance operations before this instruction complete.
The following alternative values of
DSB, but ARM recommends
that you do not use them:
SH is an alias for ISH.
SHST is an alias for ISHST.
UN is an alias for NSH.
UNST is an alias for NSHST.
This ARM and 32-bit Thumb instruction is available in ARMv7.
There is no 16-bit version of this instruction in Thumb.