MCRR and MCRR2
Move to Coprocessor from ARM Registers. Depending on the coprocessor, you might be able to specify various additional operations.
is an optional condition code. In ARM code,
condis not permitted for
is the name of the coprocessor the instruction is for. The standard name is pn, where n is an integer in the range 0 to 15.
is a 4-bit coprocessor-specific opcode.
- Rt, Rt2
are ARM source registers.
Rt2must not be PC.
is a coprocessor register.
The use of these instructions depends on the coprocessor. See the coprocessor documentation for details.
MCRR ARM instruction is available
in ARMv6 and above, and E variants of ARMv5T.
MCRR2 ARM instruction is available
in ARMv6 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above.
There are no 16-bit versions of these instructions in Thumb.