Unsigned Long Multiply, with 32-bit operands, and 64-bit result.
is an optional suffix available in ARM state only. If S is specified, the condition flags are updated based on the result of the operation.
is an optional condition code.
- RdLo, RdHi
are the destination registers. RdLo and RdHi must be different registers.
- Rn, Rm
are ARM registers holding the operands.
UMULL instruction interprets the values from Rn and
Rm as unsigned integers. It multiplies these integers and places the
least significant 32 bits of the result in RdLo, and the most significant
32 bits of the result in RdHi.
Rn must be different from RdLo and RdHi in architectures before ARMv6.
You cannot use PC for any register.
You can use SP in ARM instructions but this is deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
If S is specified, this instruction:
Updates the N and Z flags according to the result.
Does not affect the C or V flags.
This ARM instruction is available in all versions of the ARM architecture.
This 32-bit Thumb instruction is available in ARMv6T2 and above.
There is no 16-bit version of this instruction in Thumb.
UMULL r0, r4, r5, r6