Zero extend Halfword and Add.
is an optional condition code.
is the destination register.
is the register holding the number to add.
is the register holding the value to extend.
is one of:
Rmis rotated right 8 bits.
Rmis rotated right 16 bits.
Rmis rotated right 24 bits.
rotationis omitted, no rotation is performed.
UXTAH extends a 16-bit value to a 32-bit value. It does this by:
Rotating the value from
Rmright by 0, 8, 16 or 24 bits.
Extracting bits[15:0] from the value obtained.
Zero extending to 32 bits.
Adding the value from
You cannot use PC for any register.
You can use SP in ARM instructions but this is deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
This instruction does not change the flags.
This ARM instruction is available in ARMv6 and above.
This 32-bit Thumb instruction is available in ARMv6T2 and above. For the ARMv7-M architecture, it is only available in an ARMv7E-M implementation.
There is no 16-bit version of this instruction in Thumb.