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NEG pseudo-instruction

Negate the value in a register.

NEG{ cond } Rd , Rm

where:

cond

is an optional condition code.

Rd

is the destination register.

Rm

is the register containing the value that is subtracted from zero.

Operation

The NEG pseudo-instruction negates the value in one register and stores the result in a second register.

NEG{cond} Rd, Rm assembles to RSBS{cond} Rd, Rm, #0.

Architectures

The ARM encoding of this pseudo-instruction is available in all versions of the ARM architecture.

The 32-bit Thumb encoding of this pseudo-instruction is available in ARMv6T2 and later.

Register restrictions

In ARM instructions, using SP or PC for Rd or Rm is deprecated. In Thumb instructions, you cannot use SP or PC for Rd or Rm .

Condition flags

This pseudo-instruction updates the condition flags, based on the result.

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