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STR, unprivileged

Unprivileged Store, byte, halfword, or word.

STR{ type }T{ cond } Rt , [ Rn {, # offset }] ; immediate offset (Thumb, 32-bit encoding only)

STR{ type }T{ cond } Rt , [ Rn ] {, # offset } ; post-indexed (ARM only)

STR{ type }T{ cond } Rt , [ Rn ], ± Rm {, shift } ; post-indexed (register) (ARM only)

where:

type

can be any one of:

B

unsigned Byte (Zero extend to 32 bits on loads.)

SB

signed Byte (LDR only. Sign extend to 32 bits.)

H

unsigned Halfword (Zero extend to 32 bits on loads.)

SH

signed Halfword (LDR only. Sign extend to 32 bits.)

-

omitted, for Word.

cond

is an optional condition code.

Rt

is the register to load or store.

Rn

is the register on which the memory address is based.

offset

is an offset. If offset is omitted, the address is the value in Rn .

Rm

is a register containing a value to be used as the offset. Rm must not be PC.

shift

is an optional shift.

Operation

When these instructions are executed by privileged software, they access memory with the same restrictions as they would have if they were executed by unprivileged software.

When executed by unprivileged software, these instructions behave in exactly the same way as the corresponding store instruction, for example STRSBT behaves in the same way as STRSB.

Offset ranges and architectures

The following table shows the ranges of offsets and availability of this instruction:


Table 1. Offsets and architectures, STR (User mode)
Instruction Immediate offset Post-indexed +/–Rm 1 shift Arch.
ARM, word or byte Not available –4095 to 4095 +/– Rm LSL #0-31 All
        LSR #1-32  
        ASR #1-32  
        ROR #1-31  
        RRX  
ARM, signed byte, halfword, or signed halfword Not available –255 to 255 +/– Rm Not available T2
Thumb 32-bit encoding, word, halfword, signed halfword, byte, or signed byte 0 to 255 Not available Not available T2

Notes about the Architecture column

Entries in the Architecture column indicate that the instructions are available as follows:

All

All versions of the ARM architecture.

T2

The ARMv6T2 and above architectures.

1

You can use –Rm, +Rm, or Rm.

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